From: Anton Mikanovich <amikan@ilbers.de>
To: isar-users@googlegroups.com
Cc: Anton Mikanovich <amikan@ilbers.de>
Subject: [PATCH] CI: Protect Debian Ports targets by KFAIL
Date: Mon, 31 Jan 2022 12:43:22 +0300 [thread overview]
Message-ID: <20220131094322.1026434-1-amikan@ilbers.de> (raw)
Debian Ports provides unofficial architectures support which not always
stable enough.
Currently few sifive-fu540-sid-ports recipes fail with:
opensbi-0.9/lib/sbi/sbi_tlb.c: Assembler messages:
opensbi-0.9/lib/sbi/sbi_tlb.c:175: Error: unrecognized opcode `fence.i'
...
../arch/riscv/include/asm/timex.h: Assembler messages:
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a1,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a1,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr t4,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01'
../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a2,0xc01'
To not block other targets cover both sid-ports targets with KFAIL.
Signed-off-by: Anton Mikanovich <amikan@ilbers.de>
---
testsuite/build_test/build_test.py | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/testsuite/build_test/build_test.py b/testsuite/build_test/build_test.py
index 683aa55d..16f6d0a3 100644
--- a/testsuite/build_test/build_test.py
+++ b/testsuite/build_test/build_test.py
@@ -124,8 +124,6 @@ class NoCrossTest(CIBaseTest):
'mc:qemuamd64-bullseye:isar-initramfs',
'mc:qemumipsel-buster:isar-image-base',
'mc:qemumipsel-bullseye:isar-image-base',
- 'mc:qemuriscv64-sid-ports:isar-image-base',
- 'mc:sifive-fu540-sid-ports:isar-image-base',
'mc:imx6-sabrelite-bullseye:isar-image-ubi',
'mc:phyboard-mira-bullseye:isar-image-ubi',
'mc:rpi-arm-bullseye:isar-image-base',
@@ -160,6 +158,17 @@ class NoCrossTest(CIBaseTest):
except:
self.cancel('KFAIL')
+ def test_nocross_sidports(self):
+ targets = [
+ 'mc:qemuriscv64-sid-ports:isar-image-base',
+ 'mc:sifive-fu540-sid-ports:isar-image-base'
+ ]
+
+ try:
+ self.perform_build_test(targets, 0, None)
+ except:
+ self.cancel('KFAIL')
+
class RebuildTest(CIBaseTest):
"""
--
2.20.1
next reply other threads:[~2022-01-31 9:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-31 9:43 Anton Mikanovich [this message]
2022-01-31 9:45 ` Anton Mikanovich
2022-01-31 10:31 ` Jan Kiszka
2022-01-31 15:52 ` Anton Mikanovich
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