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[85.214.156.166]) by gmr-mx.google.com with ESMTPS id ay18si1068837wrb.1.2022.01.31.01.43.31 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 31 Jan 2022 01:43:31 -0800 (PST) Received-SPF: pass (google.com: domain of amikan@ilbers.de designates 85.214.156.166 as permitted sender) client-ip=85.214.156.166; Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of amikan@ilbers.de designates 85.214.156.166 as permitted sender) smtp.mailfrom=amikan@ilbers.de Received: from localhost.localdomain (mm-145-71-214-37.mgts.dynamic.pppoe.byfly.by [37.214.71.145] (may be forged)) (authenticated bits=0) by shymkent.ilbers.de (8.15.2/8.15.2/Debian-8) with ESMTPSA id 20V9hTnW013431 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jan 2022 10:43:29 +0100 From: Anton Mikanovich To: isar-users@googlegroups.com Cc: Anton Mikanovich Subject: [PATCH] CI: Protect Debian Ports targets by KFAIL Date: Mon, 31 Jan 2022 12:43:22 +0300 Message-Id: <20220131094322.1026434-1-amikan@ilbers.de> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED autolearn=unavailable autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on shymkent.ilbers.de X-TUID: qAKxwcjRuaAY Debian Ports provides unofficial architectures support which not always stable enough. Currently few sifive-fu540-sid-ports recipes fail with: opensbi-0.9/lib/sbi/sbi_tlb.c: Assembler messages: opensbi-0.9/lib/sbi/sbi_tlb.c:175: Error: unrecognized opcode `fence.i' ... ../arch/riscv/include/asm/timex.h: Assembler messages: ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a1,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a1,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr t4,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a5,0xc01' ../arch/riscv/include/asm/timex.h:15: Error: unrecognized opcode `csrr a2,0xc01' To not block other targets cover both sid-ports targets with KFAIL. Signed-off-by: Anton Mikanovich --- testsuite/build_test/build_test.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/testsuite/build_test/build_test.py b/testsuite/build_test/build_test.py index 683aa55d..16f6d0a3 100644 --- a/testsuite/build_test/build_test.py +++ b/testsuite/build_test/build_test.py @@ -124,8 +124,6 @@ class NoCrossTest(CIBaseTest): 'mc:qemuamd64-bullseye:isar-initramfs', 'mc:qemumipsel-buster:isar-image-base', 'mc:qemumipsel-bullseye:isar-image-base', - 'mc:qemuriscv64-sid-ports:isar-image-base', - 'mc:sifive-fu540-sid-ports:isar-image-base', 'mc:imx6-sabrelite-bullseye:isar-image-ubi', 'mc:phyboard-mira-bullseye:isar-image-ubi', 'mc:rpi-arm-bullseye:isar-image-base', @@ -160,6 +158,17 @@ class NoCrossTest(CIBaseTest): except: self.cancel('KFAIL') + def test_nocross_sidports(self): + targets = [ + 'mc:qemuriscv64-sid-ports:isar-image-base', + 'mc:sifive-fu540-sid-ports:isar-image-base' + ] + + try: + self.perform_build_test(targets, 0, None) + except: + self.cancel('KFAIL') + class RebuildTest(CIBaseTest): """ -- 2.20.1